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The CSA 2.1 descrambler IP core is hardware implementation of DVB Common Scrambling Algorithm version 2.1. It was designed to remove protection from scrambled broadcast data by flow-through decryption ...

This project implements both data scrambler and descrambler of Wlan802.11a standard for both RX and TX side. Both Matlab and HDL codes are provided and also verified. a python script is also included ...

This repository contains hardware implementation of DVB-CSA algorithm descrambler (used in digital television) written in VHDL. Source code is synthesizable and divided into three components: ...