The next step was to replace all gates with NAND-gates, so I drew a full adder using 9 NAND-gates. After drawing the whole logic with NAND-gates, I designed the circuit using the circuit simulator of ...

This repository presents the Design of 1-Bit Full Adder. Performance improvement of Full Adder has been done by using XOR & AND gates ... circuit. Synopsys 28nm PDK:The Synopsys 28nm Process Design ...